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| Small Signal Transistor PROCESS CP588 PNP - Low Noise Amplifier Transistor Chip PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY GROSS DIE PER 4 INCH WAFER 53,730 PRINCIPAL DEVICE TYPES 2N2605 2N3799 PN4250A CMPT5086 CMPT5087 EPITAXIAL PLANAR 15 x 15 MILS 9.0 MILS 4.0 x 4.0 MILS 5.5 x 5.5 MILS Al - 30,000A Au - 18,000A BACKSIDE COLLECTOR 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R3 (21-August 2006) PROCESS CP588 Typical Electrical Characteristics 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R3 (21-August 2006) |
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